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Integer Codes Correcting Single Errors and Detecting Burst Errors Within a Byte

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2020
TDMR-2020-07-0171-R-Manuscript.pdf (952.4Kb)
Authors
Radonjić, Aleksandar
Article (Accepted Version)
Metadata
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Abstract
Correcting single and detecting adjacent errors has become important in memory systems using high density DRAM chips. The reason is that, in these systems, the strike of a single energetic particle can upset one or more adjacent bits. In this article, we present a simple solution for this problem based on integer codes capable of correcting single errors and detecting l -bit burst errors confined to a b -bit byte ( 1<l<b ). Unlike the classical approach, the proposed one does not rely on the use of dedicated encoding/decoding hardware. Instead, it uses the processor as both encoder and decoder. The effectiveness of such solution is demonstrated on a theoretical model of an eight-core processor. The obtained results show that it has the potential to be used in future DDR5 systems.
Keywords:
materials reliability / DRAM chips / decoding / error corection / hardware / software / integer codes / single errors / burst errors / eight-core processor
Source:
IEEE Transactions on Device and Materials Reliability, 2020, 20, 4, 748-753
Publisher:
  • Institute of Electrical and Electronics Engineers (IEEE)
Funding / projects:
  • Ministry of Education, Science and Technological Development, Republic of Serbia, Grant no. 200175 (Institute of Technical Sciences of SASA, Belgrade) (RS-200175)
Note:
  • This is the peer-reviewed version of the paper: Radonjic, A., 2020. Integer Codes Correcting Single Errors and Detecting Burst Errors Within a Byte. IEEE Transactions on Device and Materials Reliability 20, 748–753. https://doi.org/10.1109/TDMR.2020.3033511
  • © 20XX IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
  • Published version: https://hdl.handle.net/21.15107/rcub_dais_9998
Related info:
  • Version of
    https://hdl.handle.net/21.15107/rcub_dais_9998
  • Version of
    http://dx.doi.org/10.1109/TDMR.2020.3033511

DOI: 10.1109/TDMR.2020.3033511

ISSN: 1530-4388; 1558-2574

WoS: 000597157500015

[ Google Scholar ]
Handle
https://hdl.handle.net/21.15107/rcub_dais_9997
URI
https://dais.sanu.ac.rs/123456789/9997
Collections
  • ИТН САНУ - Општа колекција / ITS SASA - General collection
Institution/Community
Институт техничких наука САНУ / Institute of Technical Sciences of SASA
TY  - JOUR
AU  - Radonjić, Aleksandar
PY  - 2020
UR  - https://dais.sanu.ac.rs/123456789/9997
AB  - Correcting single and detecting adjacent errors has become important in memory systems using high density DRAM chips. The reason is that, in these systems, the strike of a single energetic particle can upset one or more adjacent bits. In this article, we present a simple solution for this problem based on integer codes capable of correcting single errors and detecting l -bit burst errors confined to a b -bit byte ( 1<l<b ). Unlike the classical approach, the proposed one does not rely on the use of dedicated encoding/decoding hardware. Instead, it uses the processor as both encoder and decoder. The effectiveness of such solution is demonstrated on a theoretical model of an eight-core processor. The obtained results show that it has the potential to be used in future DDR5 systems.
PB  - Institute of Electrical and Electronics Engineers (IEEE)
T2  - IEEE Transactions on Device and Materials Reliability
T1  - Integer Codes Correcting Single Errors and Detecting Burst Errors Within a Byte
SP  - 748
EP  - 753
VL  - 20
IS  - 4
DO  - 10.1109/TDMR.2020.3033511
UR  - https://hdl.handle.net/21.15107/rcub_dais_9997
ER  - 
@article{
author = "Radonjić, Aleksandar",
year = "2020",
abstract = "Correcting single and detecting adjacent errors has become important in memory systems using high density DRAM chips. The reason is that, in these systems, the strike of a single energetic particle can upset one or more adjacent bits. In this article, we present a simple solution for this problem based on integer codes capable of correcting single errors and detecting l -bit burst errors confined to a b -bit byte ( 1<l<b ). Unlike the classical approach, the proposed one does not rely on the use of dedicated encoding/decoding hardware. Instead, it uses the processor as both encoder and decoder. The effectiveness of such solution is demonstrated on a theoretical model of an eight-core processor. The obtained results show that it has the potential to be used in future DDR5 systems.",
publisher = "Institute of Electrical and Electronics Engineers (IEEE)",
journal = "IEEE Transactions on Device and Materials Reliability",
title = "Integer Codes Correcting Single Errors and Detecting Burst Errors Within a Byte",
pages = "748-753",
volume = "20",
number = "4",
doi = "10.1109/TDMR.2020.3033511",
url = "https://hdl.handle.net/21.15107/rcub_dais_9997"
}
Radonjić, A.. (2020). Integer Codes Correcting Single Errors and Detecting Burst Errors Within a Byte. in IEEE Transactions on Device and Materials Reliability
Institute of Electrical and Electronics Engineers (IEEE)., 20(4), 748-753.
https://doi.org/10.1109/TDMR.2020.3033511
https://hdl.handle.net/21.15107/rcub_dais_9997
Radonjić A. Integer Codes Correcting Single Errors and Detecting Burst Errors Within a Byte. in IEEE Transactions on Device and Materials Reliability. 2020;20(4):748-753.
doi:10.1109/TDMR.2020.3033511
https://hdl.handle.net/21.15107/rcub_dais_9997 .
Radonjić, Aleksandar, "Integer Codes Correcting Single Errors and Detecting Burst Errors Within a Byte" in IEEE Transactions on Device and Materials Reliability, 20, no. 4 (2020):748-753,
https://doi.org/10.1109/TDMR.2020.3033511 .,
https://hdl.handle.net/21.15107/rcub_dais_9997 .

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